Intel outlines silicon photonics roadmap for next-generation HPC and AI systems
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Intel used OCP 2026 to position silicon photonics as a core interconnect technology for next-generation HPC and AI systems. The company said its foundry can supply 300 mm indium phosphide photonics at volume and is targeting photonic-system energy consumption below 5 pJ/bit.
- Intel positioned silicon photonics as a strategic interconnect technology for future HPC and AI systems.
- The company said 300 mm InP photonics could support NPO and CPO architectures.
- Intel is targeting photonic-system energy consumption below 5 pJ/bit.
- Potential infrastructure benefits depend on commercial execution and adoption, neither of which was detailed.
Intel has set out its silicon photonics direction for next-generation high-performance computing and AI infrastructure, framing photonic interconnects as a way to address bandwidth, topology and energy-efficiency requirements at rack, multi-rack and system level.
At OCP 2026, Nic Dubé, Intel vice president for data-center systems and solutions, described silicon photonics as a “Golden Hammer” for next-generation systems. Intel said its technology roadmap includes integrated lasers, near-packaged optics (NPO), co-packaged optics (CPO), external light sources and interconnect topologies designed to dynamically coordinate CPU, GPU and memory pools.
Intel also stated that Intel Foundry is the only high-volume foundry capable of supplying 300 mm indium phosphide photonics to the industry at scale. According to the company, the 300 mm platform is intended to support NPO and CPO functions for future HPC and AI applications, alongside integration capabilities required to manufacture reliable silicon-photonics platforms.
The company expects photonic-system energy consumption to fall below 5 pJ/bit. This is a target rather than an achieved operational result. If the stated manufacturing capabilities and efficiency target are realised, photonic interconnects could help reduce energy constraints associated with scaling large AI systems.
For data-center operators and infrastructure suppliers, the relevance is not a new data-center capacity announcement but the potential for lower interconnect power consumption and fewer bandwidth constraints in increasingly dense AI clusters. The announcement also signals intensifying competition around optical interconnect technologies for AI infrastructure.
As AI workloads raise bandwidth and power demands across servers, racks and clusters, more efficient optical interconnects could help ease scaling constraints. Intel’s claims point to potential gains in interconnect energy efficiency and system design flexibility, but the company provided no commercial deployment timetable, production volumes or customer commitments.
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